Please click here for the CAES Workshop Program
The importance of design constraints on embedded systems has long been
recognized, but techniques that effectively manage several constraints at once
and in an integrated fashion are still lacking at the software level.
There is a need for effective solutions that can balance many constraints at
once, including memory, storage, performance, power, and timeliness from within
embedded software. This workshop solicits papers that report new results
on the unique challenges faced by managing multiple constraints at the
software layer. The topics of interest include but are not limited to:
Accepted papers will
be published in a digest of papers to be distributed at the workshop.
Electronic submission of papers is required.
Please submit your papers by
clicking here. The deadline for submissions is
Papers should be
at most 6 pages in 10-point type and two columns. Papers must be formatted in
US Letter page size (8.5 x 11.0"). Adobe PDF is preferred for submission;
however, Postscript is acceptable. Papers must be viewable with Adobe Acrobat
3.0 or Ghostscript. Please be sure that all necessary
fonts are embedded in the PDF or postscript file.
http://www.rtss.org/CAES2003/submit.html
Workshop Co-Chairs
Bruce Childers
(childers@cs.pitt.edu),
Daniel Mosse
(mosse@cs.pitt.edu),
Pedro Mejia
Alvarez, CINVESTAV-IPN
Hakan Aydin, George Mason
University
Mahmut Kandemir, Penn State
University
Gokhan Memik, Northwestern
University
Frank Mueller, North Carolina State University
Walid Najjar, University of
California at Riverside
Priya Narasimhan,
Alex Nicolau,